RE: Improve CRC32C performance on SSE4.2

> In case Andy is asking about "how" rather than "under what circumstances", my
> guess is: -O1+  may have just chosen instructions that also happen to zero-extend,
> which are common. -O0 doesn't represent the naive straightforward structure of
> what the programmer wrote, it's more like an "exploded" representation suitable
> for later optimization passes. That's why it always looks goofy.

Hah yeah. I missed the "how" part of the question but your explanation makes sense. 

> > > Replacing that with _mm512_zextsi128_si512 fixes the problem.
> 
> Here's a patch for testing, which also reverts the previous workaround. Help
> welcome, but I still promise to test it in the near future regardless.

LGTM. 

Raghuveer