Re: Misaligned BufferDescriptors causing major performance problems on AMD

On 2015-01-26 19:58:25 -0500, Bruce Momjian wrote:
> On Tue, Jan 27, 2015 at 01:43:41AM +0100, Andres Freund wrote:
> > master + 32align.patch:
> > -c max_connections=400
> > tps = 183791.872359 (high run vs. run variability)
> > -c max_connections=401
> > tps = 185494.98244 (high run vs. run variability)
> > 
> > master + 64align.patch:
> > -c max_connections=400
> > tps = 489257.195570
> > -c max_connections=401
> > tps = 490496.520632
> > 
> > Pretty much as expected, rigth?
> 
> Yes, I am convinced.  Let's work on a patch now.

Since I can reproduce some minor (1-3%) performance *regressions* at low
client counts when aligning every shmem allocation, I'm inclined to just
add special case code to BufferShmemSize()/InitBufferPool() to align
descriptors to PG_CACHE_LINE_SIZE. That's really unlikely to regress
anythign as it basically can't be a bad idea to align buffer
descriptors.

Contrary opinions? Robert?

Greetings,

Andres Freund

-- Andres Freund                       http://www.2ndQuadrant.com/PostgreSQL Development, 24x7 Support, Training &
Services