Re: testing HS/SR - 1 vs 2 performance

On Sun, Apr 18, 2010 at 09:22:21PM +0100, Simon Riggs wrote:
> On Sun, 2010-04-18 at 13:16 -0700, David Fetter wrote:
> > On Sun, Apr 18, 2010 at 12:01:05PM +0100, Simon Riggs wrote:
> > > On Sun, 2010-04-18 at 08:24 +0100, Simon Riggs wrote:
> > > > On Sat, 2010-04-17 at 18:52 -0400, Tom Lane wrote:
> > > > > Simon Riggs <simon@2ndQuadrant.com> writes:
> > > > > > What I'm not clear on is why you've used a spinlock
> > > > > > everywhere when only weak-memory thang CPUs are a problem.
> > > > > > Why not have a weak-memory-protect macro that does does
> > > > > > nada when the hardware already protects us? (i.e. a
> > > > > > spinlock only for the hardware that needs it).
> > > > > 
> > > > > Well, we could certainly consider that, if we had enough
> > > > > places where there was a demonstrable benefit from it.  I
> > > > > couldn't measure any real slowdown from adding a spinlock in
> > > > > that sinval code, so I didn't propose doing so at the time
> > > > > --- and I'm pretty dubious that this code is sufficiently
> > > > > performance-critical to justify the work, either.
> > > > 
> > > > OK, I'll put a spinlock around access to the head of the
> > > > array.
> > > 
> > > v2 patch attached
> > 
> > If you've committed this, or any other patch you've sent here,
> > *please* mention so on the same thread.
> 
> I haven't yet. I've written two patches - this is a major module
> rewrite and is still under discussion. The other patch has nothing
> to do with this (though I did accidentally include a couple of
> changes from this patch and immediately revoked them).
> 
> I will wait awhile to see if anybody has some independent test
> results.

Thanks :)

Cheers,
David.
-- 
David Fetter <david@fetter.org> http://fetter.org/
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