"Tom Turelinckx" <tom@turelinckx.be> writes:
>> Maybe you could extract those bits too? Or if you prefer, just send me the whole .s files off-list.
> Whole .s files attached.
Thanks. The short of it seems to be that this is a compiler bug.
In the "original" code, the out-of-line segment at .LL726 is
.loc 1 4415 0ldsb [%g4], %g4
.LL726:cmp %g4, 48bne,pt %icc, .LL715 andcc %g2, 64, %g0ld [%g3+4], %g4cmp %g4, 0be,pt %icc, .LL715
andcc %g2, 64, %g0ld [%fp-24], %g4cmp %g4, 0be,pn %icc, .LL727 add %l7, -2, %g3 <--- trashes %g3ldsb
[%g4], %g4cmp %g4, 46bne,a,pt %icc, .LL748 xor %l7, 6, %g2.loc 1 4417 0ba,pt %xcc, .LL715 <--- returns to
.LL715which needs %g3 andcc %g2, 64, %g0
The corresponding part in the "patched" code is
.LL693:
.LLBE547:
.LLBE578:
.LLBB579:
.LLBB556:.loc 1 4415 0cmp %o7, 48bne,pt %icc, .LL712 andcc %g3, 64, %g0ld [%g4+4], %o7cmp %o7, 0be,pt
%icc,.LL712 andcc %g3, 64, %g0ld [%fp-24], %o7cmp %o7, 0be,a,pn %icc, .LL722 add %g1, -2, %g4 <---
storeto %g4 is annulled if no branchldsb [%o7], %o7cmp %o7, 46bne,a,pt %icc, .LL722 add %g1, -2, %g4 <---
storeto %g4 is annulled if no branch.loc 1 4417 0ba,pt %xcc, .LL712 <--- returns to .LL712 which needs %g4 andcc
%g3, 64, %g0
In short, the compiler is trying to hoist the first instruction for line
4456 into the delay slot of that branch to .LL727, and it's getting it
wrong. This would've been fine if the compiler had remembered to put the
"a" (annul) flag on the branch instruction, but it forgot.
I think you need to file a bug with the gcc maintainers. No idea if
there's anything you can give them that's shorter than this full
file, but maybe they won't care.
As a short-term workaround, reducing the -O level might help.
Or perhaps there's a different gcc version you could use?
regards, tom lane
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